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 1WCFS0808V1E
WCFS0808V1E
32K x 8 3.3V Static RAM
Features
* Single 3.3V power supply * Ideal for low-voltage cache memory applications * High speed -- 12/15 ns * Plastic SOJ and TSOP packaging An active LOW Write Enable signal (WE) controls the writing/ reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A0 through A14). Reading the device is accomplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins is present on the eight data input/output pins. The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and Write Enable (WE) is HIGH. The WCFS0808V1E is available in 28-pin standard 300-mil-wide SOJ and TSOP Type I packages.
Functional Description
The WCFS0808V1E is a high-performance 3.3V CMOS Static RAM organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE) and active LOW Output Enable (OE) and three-state drivers. The device has an automatic power-down feature, reducing the power consumption by more than 95% when deselected.
Logic Block Diagram
Pin Configurations
SOJ Top View
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A4 A3 A2 A1 OE A0 CE I/O7 I/O6 I/O5 I/O4 I/O3
INPUT BUFFER
I/O0 I/O1
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
CE WE OE
ROW DECODER
I/O2
SENSE AMPS 32K x 8 ARRAY
I/O3 I/O4 I/O5
COLUMN DECODER
POWER DOWN
I/O6 I/O7
A 10
A 11
A 12 A 13
Selection Guide
WCFS0808V1E 12ns Maximum Access Time (ns) Maximum Operating Current (mA) Maximum CMOS Standby Current (A) 12 55 500 WCFS0808V1E 15ns 15 50 500
Document #: 38-05225 Rev. **
A 14
Revised February 11, 2002
WCFS0808V1E
Pin Configuration
TSOP Top View OE A1 A2 A3 A4 WE VCC A5 A6 A7 A8 A9 A10 A11
22 23 24 25 26 27 28 1 2 3 4 5 6 7 21 20 19 18 17 16 15 14 13 12 11 10 9 8
A0 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A14 A13 A12
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. -65C to +150C Ambient Temperature with Power Applied............................................. -55C to +125C Supply Voltage on VCC to Relative GND[1] .... -0.5V to +4.6V DC Voltage Applied to Outputs in High Z State[1] ....................................-0.5V to VCC + 0.5V DC Input Voltage[1].................................-0.5V to VCC + 0.5V
Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current.................................................... >200 mA
Operating Range
Range Commercial Ambient Temperature 0C to +70C VCC 3.3V 300 mV
Electrical Characteristics Over the Operating Range[1]
WCFS0808V1E 12ns Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB1 ISB2 Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current Output Leakage Current Output Short Circuit Current[2] VCC Operating Supply Current Automatic CE Power-Down Current -- TTL Inputs Automatic CE Power-Down Current -- CMOS Inputs[3] GND VI VCC, Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA, f = fMAX = 1/tRC Max. VCC, CE VIH, VIN VIH, or VIN VIL,f = fMAX Max. VCC, CE VCC - 0.3V, VIN VCC - 0.3V, or VIN 0.3V, WE VCC - 0.3V or WE 0.3V, f = fMAX Test Conditions VCC = Min., IOH = -2.0 mA VCC = Min., IOL = 4.0 mA 2.2 -0.3 -1 -5 Min. 2.4 0.4 VCC +0.3V 0.8 +1 +5 -300 55 5 500 Max. Unit V V V V A A mA mA mA A
Notes: 1. Minimum voltage is equal to - 2.0V for pulse durations of less than 20 ns. 2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds. 3. Device draws low standby current regardless of switching on the addresses.
Document #: 38-05225 Rev. **
Page 2 of 10
WCFS0808V1E
Electrical Characteristics Over the Operating Range (continued)
WCFS0808V1E 15ns Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB1 Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current Output Leakage Current Output Short Circuit Current[2] VCC Operating Supply Current Automatic CE Power-Down Current -- TTL Inputs Automatic CE Power-Down Current -- CMOS Inputs[3] GND VI VCC, Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA, f = fMAX = 1/tRC Max. VCC, CE VIH, VIN VIH, or VIN VIL, f = fMAX Max. VCC, CE VCC-0.3V, VIN VCC - 0.3V, or VIN 0.3V, WEVCC-0.3V or WE 0.3V, f=fMAX Test Conditions VCC = Min., IOH = -2.0 mA VCC = Min., IOL = 4.0 mA 2.2 -0.3 -1 -5 Min. 2.4 0.4 VCC +0.3V 0.8 +1 +5 -300 50 5 Max. Unit V V V V A A mA mA mA
ISB2
500
A
Capacitance[4]
Parameter CIN: Addresses CIN: Controls COUT Output Capacitance Description Input Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = 3.3V Max. 5 6 6 Unit pF pF pF
AC Test Loads and Waveforms
3.3V OUTPUT CL INCLUDING JIG AND SCOPE Equivalent to: THEVENIN EQUIVALENT 167 OUTPUT 1.73V R2 351 R1 317 ALL INPUT PULSES 3.0V GND 10% 90% 90% 10% 3 ns
3 ns
Note: 4. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05225 Rev. **
Page 3 of 10
WCFS0808V1E
Switching Characteristics Over the Operating Range[5]
WCFS0808V1E 12ns Parameter READ CYCLE tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD WRITE tWC tSCE tAW tHA tSA tPWE tSD tHD tHZWE tLZWE CYCLE[8, 9] Write Cycle Time CE LOW to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width Data Set-Up to Write End Data Hold from Write End WE LOW to High Z[8] 3 WE HIGH to Low Z[6] 12 8 8 0 0 8 7 0 7 ns ns ns ns ns ns ns ns ns ns Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid OE LOW to Data Valid OE LOW to Low Z[6] OE HIGH to High Z CE LOW to Low Z CE HIGH to High Z
[6, 7] [6] [6, 7]
Description
Min. 12
Max.
Unit ns
12 3 12 5 0 5 3 6 0 12
ns ns ns ns ns ns ns ns ns ns
CE LOW to Power-Up CE HIGH to Power-Down
Notes: 5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and capacitance CL = 30 pF. 6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 7. tHZOE, tHZCE, tHZWE are specified with CL = 5 pF as in AC Test Loads. Transition is measured 500 mV from steady state voltage. 8. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 9. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD.
Document #: 38-05225 Rev. **
Page 4 of 10
WCFS0808V1E
Switching Characteristics Over the Operating Range[5] (Continued)
WCFS0808V1E 15ns Parameter READ CYCLE tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD WRITE CYCLE[8, 9] tWC tSCE tAW tHA tSA tPWE tSD tHD tHZWE tLZWE Write Cycle Time CE LOW to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width Data Set-Up to Write End Data Hold from Write End WE LOW to High WE HIGH to Low Z[8] Z[6] 3 15 10 10 0 0 10 8 0 7 ns ns ns ns ns ns ns ns ns ns Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid OE LOW to Data Valid OE LOW to Low Z
[6] [6, 7]
Description
Min. 15
Max.
Unit ns
15 3 15 6 0 6 3 7 0 15
ns ns ns ns ns ns ns ns ns ns
OE HIGH to High Z CE HIGH to High
CE LOW to Low Z[6] Z[6, 7] CE LOW to Power-Up CE HIGH to Power-Down
Data Retention Characteristics (Over the Operating Range)
Parameter VDR tCDR tR Description VCC for Data Retention Chip Deselect to Data Retention Time Operation Recovery Time VCC = VDR = 2.0V, CE > VCC - 0.3V, VIN > VCC - 0.3V or VIN < 0.3V Conditions Min. 2.0 0 tRC Max. Unit V ns ns
Document #: 38-05225 Rev. **
Page 5 of 10
WCFS0808V1E
Data Retention Waveform
DATA RETENTION MODE VCC CE 3.0V tCDR VDR > 2V 3.0V tR
Switching Waveforms
Read Cycle No. 1[10, 11]
tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID
Read Cycle No. 2[11, 12]
CE tACE OE tDOE DATA OUT tLZOE HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tPU 50% DATA VALID tPD ICC 50% ISB tHZOE tHZCE tRC
HIGH IMPEDANCE
Notes: 10. Device is continuously selected. OE, CE = VIL. 11. WE is HIGH for read cycle. 12. Address valid prior to or coincident with CE transition LOW.
Document #: 38-05225 Rev. **
Page 6 of 10
WCFS0808V1E
Switching Waveforms (continued)
Write Cycle No. 1 (WE Controlled)[8, 13, 14]
tWC ADDRESS CE tAW WE tSA tPWE tHA
OE tSD DATA I/O NOTE 15 tHZOE DATAINVALID tHD
Write Cycle No. 2 (CE Controlled)[8, 13, 14]
tWC ADDRESS CE tSA tAW WE tSD DATA I/O DATAINVALID tHD tHA tSCE
Write Cycle No. 3 (WE Controlled, OE LOW)[9, 14]
tWC ADDRESS CE tAW WE tSA tHA
tSD DATA I/O NOTE 15 tHZWE
Notes: 13. Data I/O is high impedance if OE = VIH. 14. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 15. During this period, the I/Os are in the output state and input signals should not be applied.
tHD
DATA IN VALID tLZWE
Document #: 38-05225 Rev. **
Page 7 of 10
WCFS0808V1E
Truth Table
CE H L L L WE X H L H OE X L X H Input/Output High Z Data Out Data In High Z Read Write Deselect, Output Disabled Mode Deselect/Power-Down Power Standby (ISB) Active (ICC) Active (ICC) Active (ICC)
Ordering Information
Speed (ns) 12 15 Ordering Code WCFS0808V1E-JC12 WCFS0808V1E-JC15 WCFS0808V1E-TC15 Package Name J J T Package Type 28-Lead Molded SOJ 28-Lead Molded SOJ 28-Lead Thin Small Outline Package Operating Range Commercial
Document #: 38-05225 Rev. **
Page 8 of 10
WCFS0808V1E
Package Diagrams
28-Lead (300-Mil) Molded SOJ J
28-Lead Thin Small Outline Package Type 1 (8x13.4 mm) T
Document #: 38-05225 Rev. **
Page 9 of 10
WCFS0808V1E
Revision History
Document Title: WCFS0808V1E 32K x 8 3.3V Static RAM Document Number: Document #: 38-05225 Rev. ** REV. ** ECN NO. 113103 ISSUE DATE 1/25/2002 ORIG. OF CHANGE XFL New Datasheet DESCRIPTION OF CHANGE
Document #: 38-05225 Rev. **
Page 10 of 10


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